Hardware Logic Locking Obfuscation for Cyber Hygiene Based on Hamming Distance Obfuscator
Abstract
The circuit netlist, logic locking mode, is an obfuscation method used to protect outsourced chip designs. Logic locking has been demonstrated to be broken via Boolean Satisfiability-based attacks, which has spurred researchers to create more robust defenses. The development of SAT attack marked a turning point in research on logic locking. Software systems frequently update their huge executable code, so obfuscating the program for each small update results in a significant loss of efficiency. In order to provide security guarantees against synthesis-driven assaults, this study provides a transformation strategy. Its Random Technique introduces a novel fault injection attack to undermine any locking mechanism that depends on a saved private key. This made it possible to compare the obfuscated circuit to its source, to determine whether a sufficient structural change has been made to support its functionality. The RT created an attack strategy to discover the value of the private key, K*. It examines the SFLL's security and offered a solution to determine the hamming distance, "h," using one or more SAT queries. It proposes an effective bit-flipping attack using the irregularity between the protected input patterns and the private key. By flipping bits, the attack cracks the private key, K*, with (n-1) queries. The outcome demonstrates that, given a protected input pattern, the right key may be quickly discovered by bit-flipping.
References
A. Saha, D. Mukhopadhyay and R. S. Chakraborty (2021): "Design and Analysis of Logic Locking Techniques," 2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC), 2021, pp. 1-2, https://doi.org/10.1109/VLSI-SoC53125.2021.9606975.
Alan Rodrigo Diaz RizoJulian LeonhardHassan AboushadyHassan AboushadyHaralampos-G. Stratigopoulos (2022): “RF Transceiver Security Against Piracy Attacks January 2022.” Circuits and Systems II: Express Briefs, IEEE Transactions on https://doi.org/10.1109/TCSii.2022.3165709
Animesh Chhotaray and Thomas Shrimpton (2022): “Hardening Circuit-Design IP Against Reverse-Engineering Attacks”. 2022 IEEE Symposium on Security and Privacy (SP) Year: 2022, Pages: 379-396. https://doi.org/10.1109/SP46214.2022.00023.
Antonios Pavlidis, Eric Faehn, Eric Faehn, Marie-Minerve Louerat, Marie-Minerve Louerat, Haralampos-G. Stratigopoulos (2022); “Run-Time Hardware Trojan Detection in Analog and Mixed-Signal ICs April 2022 Conference: 2022 IEEE 40th VLSI Test Symposium (VTS). https://doi.org/10.1109/VTS52500.2021.9794208.
Bellizia, D., Scotti, G., Trifiletti, A. (2018): “logic style as a countermeasure against side‐channel attacks: secure cells and experimental results”. IEEE Trans. Circuits Syst. I: Reg. Papers. 65(11), 3874–3884 (2018).
Chatterjee, P., Chatterjee, A., Campos, J., Abreu, R., Roy, S.(2020): “Diagnosing software faults using multiverse analysis.” In: Bessiere, C. (ed.) Proceedings of the Twenty-Ninth International Joint Conference on Artificial Intelligence, IJCAI-20. pp. 1629–1635. International Joint Conferences on Artificial Intelligence Organization 2020). https://doi.org/10.24963/ijcai.2020/226, main track. https://doi.org/1024963/ijcai.3030/226.
Chicco, D., Tötsch, N. & Jurman, G (2021): The Matthews correlation coefficient (MCC) is more reliable than balanced accuracy, bookmaker informedness, and markedness in two-class confusion matrix evaluation. BioData Mining 14, 13 (2021). https://doi.org/10.1186/s13040-021-00244-z
Christoph Kerschbaumer Tom Ritter, Frederik Braun (2020): “Hardening Firefox against Injection Attacks”.2020 IEEE European Symposium on Security and Privacy Workshops (EuroS&PW), Year: 2020, Pages: 653-663.
Dongpeng Xu, Binibin Liu, Weijii Feng. Jiang Ming, Oilong Zheng, Jing li, Olaoyan Yu (2021); “Boosting SMT Solver Performance on Mixed Bitwise – arithmetic expressions. PLDI 2021” : Proceedings of the 42nd ACM SIGPLAN International Conference on Programming Language Design and Implementation, june 2021, pages 651 – 664. https://doi.org/10.1145/3453483.3454068
Golia, P., Roy, S., Meel, K.S.(2021): “Program synthesis as dependency quantified formula modulo theory.” In: Zhou, Z.H. (ed.) Proceedings of the Thirtieth In- ternational Joint Conference on Artificial Intelligence, IJCAI-21. pp. 1894– 1900. International Joint Conferences on Artificial Intelligence Organization (2021). https://doi.org/10.24963/ijcai.2021/261.
Gomez, H., Duran, C., Roa, E. (2019): Defeating silicon reverse engineering using a layout‐ level standard cell camouflage. IEEE Trans. Consum. Electron. 65(1), 109- 118 (2019).
Hadeel Alrubayyi, Gokop Geteng, Mona Jaber and James Kell (2021): “Challenges of Malware Detection in the IoT and Review of Artificial Immune System, Approaches. Sensor and Actuator Networks. Journal of Sensor Actuator Network _ 2021, 10(4), 61; https://doi.org/10.3390/jsan 10040061.
https://doi.org/10.1109/EuroSPW51379.2020.00094.
Isyak MeirobieAgustinus Purna IrawanAgustinus Purna IrawanHusni Teja SukmanaHusni Teja Sukmana, Nuke Puji Lestari SantosoNuke Puji Lestari Santoso (2022): “Framework Authentication e-document using Block chain Technology on the Government system”. July 2022 International Journal of Artificial Intelligence Research 6(2) https://doi.org/10.29099/ijair.v6i2.294.
Jean Paul A., Yeacoub, Ola-salman, Hassan N. Moura, Nesirene Kaaniche, Ali Chehab and Mohammad Malli (2020): “Cyber – Physical Systems security; Limitations, Issues and Future trends. Microprocessor Microsystem 2020, 77, 103201, https://doi.org/10.1016/micpro.2020.103201.
Jianqi Chen and Benjamin Carrion Schafer (2021), "Area Efficient Functional Locking through Coarse Grained Runtime Reconfigurable Architectures," 2021 26th Asia and South Pacific Design Automation Conference (ASP-DAC), 2021, pp. 542-547.
Kyle Juretus and Ioannis Savidis (2021): “Increased Output Corruption and Structural Attack Resilience for SAT Attack Secure Logic Locking”. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 40, NO. 1, JANUARY 2021, pp.38-51. https://doi.org/10.1109/TCAD.2020.2988629
Leonidas Lavdas, M Tanjidur Rahman, Mark Tehranipoor, Navid Asadizanjani (2020), "On Optical Attacks Making Logic Obfuscation Fragile", 2020 IEEE International Test Conference in Asia (ITC-Asia), pp.71-76, 2020.
Leonidas Lavdas, M. Tanjidur Rahman, Navid Asadizanjani (2021), "Application of Optical Techniques to Hardware Assurance", Emerging Topics in Hardware Security, pp.471, 2021.
Lilas Alrahis, Satwik Patnaik, Johann Knechtel, Hani Saleh, Senior, Baker Mohammad, Mahmoud Al-Qutayri, and Ozgur Sinanoglu,(2021): “UNSAIL: Thwarting Oracle-Less Machine Learning Attacks on Logic Locking.” Article in IEEE Transactions on Information Forensics and Security• February 2021. https://doi.org/101109/TIFS.2021.3057576.
Limaye, N., Patnaik, S., & Sinanoglu, O. (2022). Valkyrie: Vulnerability Assessment Tool and Attack for Provably- Secure Logic Locking Techniques. IEEE Transactions on Information Forensics and Security, 17, 744-759. https://doi.org/10.1109/TIFS.2022.3149147.
Lucas Barthelemy, Ninon Eyrolles, Guenael Renault, Raphael Roblin (2016): “ Binary Permutation Polynomial Inversion and Applications to Obfuscation Techniques”. SPRO’16’: Proceedings of the 2016 ACM workshop on Software Protection (2016). Pages 51-59. https://doi.org/10.1145/2995306.2995310.
[M. Tanjdur Rahman; M. Sazadur Rahman; Haunuu Wang; Shir Tajik; Waled Khalil; Falamah Faramah; Domenic Forte; Navid Asadizanjarin; Mark Tehranipoor (2020): “ Defence-in-depth: A receipt for Logic Locking to Prevail. Integration, the VLSI Journal 72 (2020), 39-57. https://doi.org/10.1016/j.vlsi.2019.12.007.
M. Weiner, S. Manich, R. Rodrıguez-Monta~nes, G. Sigl (2018): “The low area probing detector as a countermeasure against invasive attacks, IEEE Trans. Very Large Scale Integr. Syst. 26 (2) (2018) 392–403, https://doi.org/10.1109/TVLSI.2017.2762630.
M. Zuzak, A. Mondal and A. Srivastava (2022): "Evaluating the Security of Logic- Locked Probabilistic Circuits," in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.41, no.7, pp.2004-2009, July2022, https://doi.org/10.1109/TCAD.2021.3104270.
Mengnan Chen, Yongquan Zhou and Qifang Luo(2022): “An Improved Arithmetic Optimization Algorithm for Numerical Optimization Problems”. Mathematics 2022, 10(12), 2152; https://doi.org/10.3390/math10122152 - 20 Jun 2022
Mohamed tarek, ahmed Elshamy, Alhassan Sayed, Marie -Minerve Louerat [...] Haralampos-G. Stratigopoulos. (2021): “Locking by Untuning: A Lock-Less Approach for Analog and Mixed-Signal IC Security. Article: November 2021IEEE Transactions on Very Large Scale Integration (VLSI). November 2021IEEE Transactions on Very Large Scale Integration (VLSI) Systems PP(99). https://doi.org/10.1109/TVLSI.2021.3117584.
Pallari ahire, Jibi Abraham (2022): “Secure Cloud Model for Intellectual Privacy Protection of Arithmetic Expressions in Source Codes Using Data Obfuscation techniques. Journal of Theoretical Computer Science, Volume 922, 24th June 2022, pages 131-149. https://doi.org/101016/j.tcs.2022.04.018.
Robin David, Luigi Coniglio, Mariano Ceccato (2020); “ QSynth-A Program Syunthesis Based Approach for Binary code Deobfuscation workshop on Binary Analysis. Research (BAR) 2020 ISBN-891562-62-2. https://doi.org/10.14722/bar.2020.23009
Roy, S., Hsu, J., Albarghouthi (2021), A.: Learning differentially private mechanisms. In: 2021 2021 IEEE Symposium on Security and Privacy (SP). pp.852–865. IEEE Computer Society, Los Alamitos, CA, USA (May 2021). https://doi.org/10.1109/SP40001.2021.00060
Roy, S., Pandey, A., Dolan-Gavitt, B., Hu, Y.(2018): “Bug synthesis: Challenging bug- finding tools with deep faults.” In: Proceedings of the 2018 26th ACM Joint Meeting on European Software Engineering Conference and Symposium on the Foundations of Software Engineering. p. 224–234. ESEC/FSE 2018, Association for Computing Machinery, New York, NY, USA (2018). https://doi.org/10.1145/3236024.3236084
Ruijie Meng, Biyun Zhu, Hao YunHaicheng Li, Yan Cai, Zijiang Yang,(2019): “An Effective Tool for Detecting Concurrency Vulnerabilities”. 2019 34th IEEE/ACM International Conference on Automated Software Engineering (ASE) Year: 2019, Pages: 1154-1157 https://doi.org/10.1109/ASE.2019.00125
Sarah Amir; Bicky Shaka; Xiadin Xu; Yier Jin; Swarup Bhunia;Mark Tehranipoor; Domenic Forte (2018): “Development and Evaluation of Hardware Obfuscation Benchmarks.” Journal of Hardware and Systems Security (2018) 2:142-161. https://doi.org/10.1007/s41635-018-0036-3.
Sebastian banescu, Alexander Pretschner (2018): “A Tutorial on Software Obfuscation. Advances in computers, Volume 108, 2018 page 283 – 353 https://doi.org/10.1016/bs.adcom.2017.09.004.
Shamsi, K., Li, M., Plaks, K., Fazzari, S., Pan, D.Z., Jin, Y.(2019): “IP-Protection and Supply Chain Security through Logic Obfuscation: A Systematic Overview. Trans. on Design Automation of Electronic Systems (TODAES) p. 65 (2019)
Shamsi, K., Pan, D.Z., Jin, Y.(2019): “On the Impossibility of Approximation-Resilient Circuit Locking”. In: 2019 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), pp. 161–170. IEEE (2019)
Shuai Jang; Yao Hong, Cai Fu, yekui Qian, Lansheng Han (2021): “Function-Level Obfuscation detection method based on Graph Convolutional Networks.” Journal of Information security and Applications, Volume 61, September 2021, 102953. https://doi.org/10.1016/j.jisa.2021.102953.
Singal, D., Agarwal, P., Jhunjhunwala, S., Roy, S.(2018): Parse condition: Symbolic encoding of ll(1) parsing. In: Barthe, G., Sutcliffe, G., Veanes, M.(eds.) LPAR-22. 22nd International Conference on Logic for Programming, Artificial Intelligence and Reasoning. EPiC Series in Computing, vol. 57, pp. 637–655. Easy Chair (2018). https://doi.org/10.29007/2ndp
Shrone, D., Subramanyan, P.(2020): “Functional Analysis Attacks on Logic Locking. IEEE Transactions on Information Forensics and Security 15, 2514–2527 (2020)
Sisejkovic, D., Merchant, F., Reimann, L.M., Leupers, R.(2021): “Deceptive logic locking for hardware integrity protection against machine learning attacks.” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2021)
Sungkwang Lee, Nam-su jho, Doyoung Chung, Yousung Kang, Myungchul Kim (2022): “ RCRYPTECT: Real-time Detection of Cryptographic function in the User-Space Filesystem”. Journal of Computers and Security, Volume 112, January 2022, 102512. https://doi.org/10.1016/jcose.2021.102512
T. Hoque, R. S. Chakraborty and S. Bhunia (2020), "Hardware Obfuscation and Logic Locking: A Tutorial Introduction," in IEEE Design & Test, vol. 37, no. 3, pp. 59-77, June 2020, https://doi.org/10.1109/MDAT.2020.2984224.
Tamzidul Hoque, Raja Subhra Chakraborty and Swarup Bhunia (2020), "Hardware Obfuscation and Logic Locking: A Tutorial Introduction," in IEEE Design & Test, vol. 37, no. 3, pp. 59-77, June 2020; https://doi.org/10.1109/MDAT.2020.2984224
V. V. Rao, K. Juretus and I. Savidis (2020): "Security Vulnerabilities of Obfuscated Analog Circuits," 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020, pp. 1-5, https://doi.org/10.1109/ISCAS45731.2020.9180781.
Verma, A., Kalita, P.K., Pandey, A., Roy, S.(2020): “Interactive debugging of con- current programs under relaxed memory models”. In: Proceedings of the 18th ACM/IEEE International Symposium on Code Generation and Optimization. p. 68–80. CGO 2020, Association for Computing Machinery, New York, NY, USA (2020). https://doi.org/10.1145/3368826.3377910
Weijii Feng, Binbin Lui, Yun Xu, Dongpeng Xu, Oilong Zheng (2020): “ Neureduce: reducing Mixed Boolean Arithmetic Expressions by Recurrent Neural Network. In findings of Association for Computational Linguistics: EMNLP2020, pages 635-644. https://doi.org/10.18653/vi/202.findings=emnip.56
Xianmiao Zhang and Yingjie Lao (2019), "On the Construction of Composite Finite Fields for Hardware Obfuscation" in IEEE Transactions on Computers, vol. 68, no. 09, pp. 1353-1364, 2019. https://doi.org/10.1109/TC.2019.2901483.
Y. Zhang, A. Jain, P. Cui, Z. Zhou, and U. Guin (2021): “A Novel Topology-guided Attack and its Countermeasure towards Secure Logic Locking,” Journal of Cryptographic Engineering, vol. 11, no. 3, pp. 213–226, 2021.
Yadi Zhong, Yadi Zhong, Ujjwal Guin, Ujjwal Guin (2022): “AFIA: ATPG-Guided Fault Injection Attack on Secure Logic Locking”. June 2022 Cryptography and Security (cs.CR). https://doi.org/10.48550/arXiv.2206.04754.
Yasin, M., Mazumdar, B., Sinanoglu, O., Rajendran, J. (2020): “Removal attacks on logic locking and camouflaging techniques.” IEEE Transactions on Emerging Topics in Computing 8(2), 517–532 (2020)
Yasin, M., Rajendran, J., & Sinanoglu, O. (2020).“The Need for Logic Locking.” In Analog Circuits and Signal Processing (pp. 1-16). (Analog Circuits and Signal Processing). Springer. https://doi.org/10.1007/978-3-030-15334-2_1.
Yuejun Zhang; Qiufeng Wu; Pengjun Wang; Liang Wen; Zhicun Luan; Chongtan Gu (2021) “ TVD-PB Logic Based on Camouflaging Circuit for IoT Security.” Institution of Engineering Technology Circuits, Devices and Systems, Volume 16, Issue 1, pp. 40-52; https://doi.org/10.1049/cds2.12080.
Zhang, H., Yang, W., Fedyukovich, G., Gupta, A., Malik, S.(2020): “Synthesizing environment invariants for modular hardware verification. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 11990 LNCS, 202–225 (2020). https://doi.org/10.1007/978-3-030-39322-9 10
Zhanhao Chen, Yinzhi Cao (2020): “Fortifying JavaScript against Web Concurrency Attacks via a Kernel-Like Structure”. 2020 50th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN) JSKernel: Year: 2020, Pages: 64-75. https://doi.org/10.1109/DSN48063.2020.00026.
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